The DAD7960 is an 18-bit, 5 MSPS, charge redistribution successive approximation (SAR), analog-to-digital converter (ADC). The SAR architecture allows unmatched performance both in noise and in linearity. The DAD7960contains a low power, high speed, 18-bit sampling ADC, an internal conversion clock, and an internal reference buffer. On the CNV± edge, the DAD7960 samples the voltage difference between the IN+ and IN− pins.  The voltages on these pins swing in opposite phase between 0 V and 4.096 V and between 0 V and 5 V. The reference voltage is applied to the part externally. All conversion results are available on a single LVDS self clocked or echoed clock serial interface.  The DAD7960 is available in a 32-lead LFCSP (QFN) with operation specified from −40°C to +85°C.

• Sampling Rate: 5 MSPS.
• 18-bit resolution with no missing codes.
• Excellent ac and dc performance(Typical value)：

• Spurious Free Dynamic Range (SFDR): 115dB；
• Total Harmonic Distortion (THD): -117dB;
• Integral Non-Linearity (INL): ±2.0LSB (maximum)
• Difference Non Linear (DNL): ±0.99LSB (maximum);
• Low power dissipation: 64.5mW；
• Supply voltage: 1.8V/5.0V；
• Differential simulation input range：
• Allow ±VREF (within 0V to +VREF) any input range,

• SAR architecture: No latency/pipeline delay
• Digital logic interface: 1.8V
• Serial LVDS interface
• Operating temperature range of −40°C to +85°C 
• QFN32 Package

• Digital imaging systems
• Digital X-rays
• Computed tomography
• IR cameras
• MRI gradient control
• High speed data acquisition
• Spectroscopy